A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel

The book reports two approaches of implementation of the essential components of a Digital Phase Locked Loop based system for dealing with wireless channels showing Nakagami-m fading. It is mostly observed in mobile communication. In the first approach, the structure of a Digital phase locked loop (...

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Main Authors: Purkayastha, Basab Bijoy. (Author, http://id.loc.gov/vocabulary/relators/aut), Sarma, Kandarpa Kumar. (http://id.loc.gov/vocabulary/relators/aut)
Corporate Author: SpringerLink (Online service)
Language:English
Published: New Delhi : Springer India : Imprint: Springer, 2015.
Edition:1st ed. 2015.
Series:Signals and Communication Technology,
Subjects:
Online Access:https://doi.org/10.1007/978-81-322-2041-1
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245 1 2 |a A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel  |h [electronic resource] /  |c by Basab Bijoy Purkayastha, Kandarpa Kumar Sarma. 
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300 |a XXI, 244 p. 118 illus.  |b online resource. 
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490 1 |a Signals and Communication Technology,  |x 1860-4862 
505 0 |a Introduction -- Transmitter Receiver Techniques -- Modulation Techniques and Signal Processing -- Basic Considerations of PLL and Its Types -- Digital Phased Locked Loop -- Synchronization -- A Zero Crossing Algorithm based Digital Phase Locked Loop -- Least Square Polynomial Fitting based Digital Phase Locked Loop -- A DPLL based Recovery System for Nakagami-m Fading Channel -- Coding Assisted Carrier and Symbol Recovery using DPLL -- Carrier Phase Detection of Rayleigh and Rician Faded Signals using Digital Phase Locked Loop -- DPLL based Square Loop for Carrier Synchronization over Fading Channel -- Conclusions and Future Direction. 
520 |a The book reports two approaches of implementation of the essential components of a Digital Phase Locked Loop based system for dealing with wireless channels showing Nakagami-m fading. It is mostly observed in mobile communication. In the first approach, the structure of a Digital phase locked loop (DPLL) based on Zero Crossing (ZC) algorithm is proposed. In a modified form, the structure of a DPLL based systems for dealing with Nakagami-m fading based on Least Square Polynomial Fitting Filter is proposed, which operates at moderate sampling frequencies. A sixth order Least Square Polynomial Fitting (LSPF) block and Roots Approximator (RA) for better phase-frequency detection has been implemented as a replacement of Phase Frequency Detector (PFD) and Loop Filter (LF) of a traditional DPLL, which has helped to attain optimum performance of DPLL. The results of simulation of the proposed DPLL with Nakagami-m fading and QPSK modulation is discussed in detail which shows that the proposed method provides better performance than existing systems of similar type. 
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