Emerging Technology and Architecture for Big-data Analytics

This book describes the current state of the art in big-data analytics, from a technology and hardware architecture perspective. The presentation is designed to be accessible to a broad audience, with general knowledge of hardware design and some interest in big-data analytics. Coverage includes eme...

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Corporate Author: SpringerLink (Online service)
Other Authors: Chattopadhyay, Anupam. (Editor, http://id.loc.gov/vocabulary/relators/edt), Chang, Chip Hong. (Editor, http://id.loc.gov/vocabulary/relators/edt), Yu, Hao. (Editor, http://id.loc.gov/vocabulary/relators/edt)
Language:English
Published: Cham : Springer International Publishing : Imprint: Springer, 2017.
Edition:1st ed. 2017.
Subjects:
Online Access:https://doi.org/10.1007/978-3-319-54840-1
LEADER 04804nam a22005295i 4500
001 978-3-319-54840-1
003 DE-He213
005 20210618213751.0
007 cr nn 008mamaa
008 170420s2017 gw | s |||| 0|eng d
020 |a 9783319548401  |9 978-3-319-54840-1 
024 7 |a 10.1007/978-3-319-54840-1  |2 doi 
050 4 |a TK7888.4 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
245 1 0 |a Emerging Technology and Architecture for Big-data Analytics  |h [electronic resource] /  |c edited by Anupam Chattopadhyay, Chip Hong Chang, Hao Yu. 
250 |a 1st ed. 2017. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2017. 
300 |a XI, 330 p. 162 illus., 98 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Part I State-of-the-Art Architectures and Automation for Data-analytics -- Chapter 1. Scaling the Java Virtual Machine on a Many-core System -- Chapter 2.Scaling the Java Virtual Machine on a Many-core System -- Chapter 3.Least-squares based Machine Learning Accelerator for Big-data Analytics in Smart Buildings -- Chapter 4.Compute-in-memory Architecture for Data-Intensive Kernels -- Chapter 5. New Solutions for Cross-Layer System-Level and High-Level Synthesis -- Part II New Solutions for Cross-Layer System-Level and High-Level Synthesis -- Chapter 6.Side Channel Attacks and Efficient Countermeasures on Residue Number System Multipliers -- Chapter 7. Ultra-Low-Power Biomedical Circuit Design and Optimization: Catching The Don’t Cares -- Chapter 8.Acceleration of MapReduce Framework on a Multicore Processor -- Chapter 9. Adaptive dynamic range compression for improving envelope-based speech perception: Implications for cochlear implants -- Part III Emerging Technology, Circuits and Systems for Data-analytics -- Chapter 10. Emerging Technology, Circuits and Systems for Data-analytics -- Chapter 11. Energy Efficient Spiking Neural Network Design with RRAM Devices -- Chapter 12. Efficient Neuromorphic Systems and Emerging Technologies - Prospects and Perspectives -- Chapter 13. In-memory Data Compression Using ReRAMs -- Chapter 14. In-memory Data Compression Using ReRAMs -- Chapter 15.Data Analytics in Quantum Paradigm – An Introduction. 
520 |a This book describes the current state of the art in big-data analytics, from a technology and hardware architecture perspective. The presentation is designed to be accessible to a broad audience, with general knowledge of hardware design and some interest in big-data analytics. Coverage includes emerging technology and devices for data-analytics, circuit design for data-analytics, and architecture and algorithms to support data-analytics. Readers will benefit from the realistic context used by the authors, which demonstrates what works, what doesn’t work, and what are the fundamental problems, solutions, upcoming challenges and opportunities. Provides a single-source reference to hardware architectures for big-data analytics; Covers various levels of big-data analytics hardware design abstraction and flow, from device, to circuits and systems; Demonstrates how non-volatile memory (NVM) based hardware platforms can be a viable solution to existing challenges in hardware architecture for big-data analytics. 
650 0 |a Electronic circuits. 
650 0 |a Microprocessors. 
650 0 |a Big data. 
650 1 4 |a Circuits and Systems.  |0 https://scigraph.springernature.com/ontologies/product-market-codes/T24068 
650 2 4 |a Processor Architectures.  |0 https://scigraph.springernature.com/ontologies/product-market-codes/I13014 
650 2 4 |a Electronic Circuits and Devices.  |0 https://scigraph.springernature.com/ontologies/product-market-codes/P31010 
650 2 4 |a Big Data/Analytics.  |0 https://scigraph.springernature.com/ontologies/product-market-codes/522070 
700 1 |a Chattopadhyay, Anupam.  |e editor.  |0 (orcid)0000-0002-8818-6983  |1 https://orcid.org/0000-0002-8818-6983  |4 edt  |4 http://id.loc.gov/vocabulary/relators/edt 
700 1 |a Chang, Chip Hong.  |e editor.  |4 edt  |4 http://id.loc.gov/vocabulary/relators/edt 
700 1 |a Yu, Hao.  |e editor.  |4 edt  |4 http://id.loc.gov/vocabulary/relators/edt 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9783319548395 
776 0 8 |i Printed edition:  |z 9783319548418 
776 0 8 |i Printed edition:  |z 9783319854977 
856 4 0 |u https://doi.org/10.1007/978-3-319-54840-1 
912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712)