Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits
Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to significant challenges for IC testing. As the variation of fundamental parameters such as channel length, threshold voltage, thin oxide thickness and interconnect dimensions goes well beyond acceptabl...
| Main Authors: | , |
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| Corporate Author: | |
| Language: | English |
| Published: |
New York, NY :
Springer US : Imprint: Springer,
2007.
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| Edition: | 2nd ed. 2007. |
| Series: | Frontiers in Electronic Testing,
34 |
| Subjects: | |
| Online Access: | https://doi.org/10.1007/0-387-46547-2 |