|
|
|
|
| LEADER |
00674cam a2200193 7i4500 |
| 001 |
0000067273 |
| 005 |
20090215090000.0 |
| 008 |
090215s2007 flua 001 0 eng |
| 020 |
# |
0 |
|a 1420051547
|
| 020 |
# |
0 |
|a 9781420051544
|
| 090 |
0 |
0 |
|a TK 7868 .D5
|b C3 2007
|
| 100 |
1 |
# |
|a Cavanagh, Joseph J. F.
|
| 245 |
1 |
0 |
|a VeriIog HDL :
|b digital design and modeling
|c Joseph Cavanagh.
|
| 260 |
# |
# |
|a Boca Raton, FL:
|b CRC Press,
|c 2007.
|
| 300 |
# |
# |
|a xviii, 900 p.:
|b ill.;
|c 26 cm..
|
| 650 |
0 |
0 |
|a Logic circuits --
|x Computer-aided design
|
| 650 |
0 |
0 |
|a Verilog (Computer hardware description language)
|
| 650 |
0 |
0 |
|a Digital electronics
|
| 999 |
|
|
|a 1100061179
|b Book
|c Open Shelf
|e KOLEKSI TERBUKA
|
