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Advanced Hardware Design for Error Correcting Codes

This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book’s chapters are written by internationally recognized...

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Corporate Author: SpringerLink (Online service)
Other Authors: Chavet, Cyrille. (Editor, http://id.loc.gov/vocabulary/relators/edt), Coussy, Philippe. (Editor, http://id.loc.gov/vocabulary/relators/edt)
Language:English
Published: Cham : Springer International Publishing : Imprint: Springer, 2015.
Edition:1st ed. 2015.
Subjects:
Electronic circuits.
Electrical engineering.
Computers.
Circuits and Systems.
Communications Engineering, Networks.
Information Systems and Communication Service.
Online Access:https://doi.org/10.1007/978-3-319-10569-7
Table of Contents:
  • User Needs
  • Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding
  • Implementation of Polar Decoders
  • Parallel architectures for Turbo Product Codes Decoding
  • VLSI implementations of sphere detectors
  • Stochastic Decoders for LDPC Codes
  • MP-SoC/NoC architectures for error correction
  • ASIP design for multi-standard channel decoders
  • Hardware design of parallel interleaver architecture: a survey.                                                                                                                                       .

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